Home     Products     Ordering     Support     Forums     Search     Downloads     FAQ     About     Contacts   8 Sep 2010 9:30:37 Latest News Search Acqura Subscribe to our newsletter Login Register There are 17 Guest users online. Products   Emulation Tools     8xC51 Family     LPC76x Family     8xC51MX Family     LPC900 Family     Choosing an     Emulator   Programmers   Adapters   Bondouts/Spares   Repairs   Microcontroller Sales Ordering   Show My Cart   Proceed to Checkout Support   Downloads   Forums   Links and Resources   Data Sheets   Technical Notes   Testimonials   FAQ   Common Problems   Repairs and Returns   Contacting Us   About Acqura Take our Poll When programming ARM microcontrollers, what is your preferred language? Assembler C Pascal Modula-2 Other    Free polls from Pollhost.com LPC914 P1.2 configuration issue This thread was started in the I/O Forum by user Phoebe on 31-5-2004 17:51 To add a posting to this thread, click on the message you wish to reply to. Your reply will be inserted at that point in the thread. Topic Posted User * LPC914 P1.2 configuration issue Hi All, I am having trouble getting my head around the P1.2 mode configuration on the Philips LPC914 device. At reset the mode register bits read both high which according to the datasheet indicates that the P1.2 bit is in open-drain mode. However I cannot write to this port bit. I am missing something - anyone got any ideas? Phoebe Reply to this post 31-5-2004 17:51 Views: 2091 Phoebe RE: LPC914 P1.2 configuration issue Hi, j never used LPC914 but j know in the LPC932 (same family) this port is not configurable, it is always open-drain! J dont''understand what you mean for "cannot write to this bit port", but remember due to the fact the pin is open-drain you must add an external pull-up to the pin, if you want to see a voltage transition when you write "0" or "1" to this pin. Bye. Massimo. Reply to this post  7-6-2004  1:47 Views: 2064 massimo RE: LPC914 P1.2 configuration issue Hi Phoebe and Massimo, I have found that there is some confusion about setting the mode of the P1 port bits. As Massimo has pointed out P1.2 is open-drain so that it, and P1.3 and P1.5 (input-only), cannot be configured. What has been found confusing is that if the mode registers are read then the P1.2,3,5 bits read back as ''1'' (because they are unimplimented) which when decoded implies that they are in open-drain mode. This is of course incorrect as at reset they are input-only. My suggestion is to always configure these bits as stated in the ... more (see whole posting) Reply to this post  7-6-2004 18:59 Views: 2109 Support Start new topic in the I/O forum Show all topics in the I/O forum Show all forums Show all my postings Show all threads added to since my last visit Show all threads with no replies info@acqura.com Home Last modified on Tue Apr 20 19:53:16 CDT 2004 Copyright © 2008. Acqura Systems All rights reserved. Counter