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 Datasheets
Datasheet P89C51X2/52X2/54X2/58X2; 80C51 8-bit Flash microcontroller family Datasheet

A summary of the datasheet is shown below. Get the full datasheet as a PDF.


The Philips microcontrollers described in this data sheet are high-performance static 80C51 designs. They are manufactured in an advanced CMOS process and contain a non-volatile Flash program memory. They support both 12-clock and 6-clock operation.

The P89C51X2 and P89C52X2/54X2/58X2 contain 128 byte RAM and 256 byte RAM respectively, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits.

In addition, the devices are static designs which offer a wide range of operating frequencies down to zero. Two software selectable modes of power reduction - idle mode and power-down mode - are available. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. Since the design is static, the clock can be stopped without loss of user data. Then the execution can be resumed from the point the clock was stopped.

Features
-80C51 Central Processing Unit
-4 Kbytes Flash (P89C51X2)
-8 Kbytes Flash (P89C52X2)
-16 Kbytes Flash (P89C54X2)
-32 Kbytes Flash (P89C58X2)
-128 byte RAM (P89C51X2)
-256 byte RAM (P89C52/54X2/58X2)
-Boolean processor
-Fully static operation
-12-clock operation with selectable 6-clock operation (via software or via parallel programmer)
-Memory addressing capability
-Up to 64 Kbytes ROM and 64 Kbytes RAM
-Power control modes:
-Clock can be stopped and resumed
-Idle mode
-Power-down mode
-Two speed ranges
-0 to 20 MHz with 6-clock operation
-0 to 33 MHz with 12-clock operation
-LQFP, PLCC or DIP package
-Extended temperature ranges
-Dual Data Pointers
-Three security bits
-Four interrupt priority levels
-Six interrupt sources
-Four 8-bit I/O ports
-Full-duplex enhanced UART
-Framing error detection
-Automatic address recognition
-Three 16-bit timers/counters T0, T1 (standard 80C51) and additional T2 (capture and compare)
-Programmable clock-out pin
-Asynchronous port reset
-Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock mode)
-Wake-up from Power Down by an external interrupt

See the full datasheet as a PDF
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Last modified on
Wed May 5 12:02:14 CDT 2004
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